datasheet please read the important notice and warnings at the end of this document www.infineon.com <2016 - 08 - 01> control integrated power system (cipos?) ikcm20l60ga datasheet
datasheet 2 <2016 - 08 - 01> control integrated power system (cipos?) ikcm20l60ga table of contents cipos ? features ................................ ................................ ................................ ................................ ................................ .. 3 target a pplications ................................ ................................ ................................ ................................ ...................... 3 description ................................ ................................ ................................ ................................ ................................ .. 3 system configuration ................................ ................................ ................................ ................................ .................. 3 pin configuration ................................ ................................ ................................ ................................ ................... 4 internal electrical schematic ................................ ................................ ................................ ................................ . 4 pin assignment ................................ ................................ ................................ ................................ ...................... 5 pin description ................................ ................................ ................................ ................................ ...................... 5 hin(u, v, w) and lin(u, v, w) (low side and high side control pins, pin 7 - 12) ................................ ......................... 5 vfo (fault - output and ntc , pin 1 4 ) ................................ ................................ ................................ ............................ 6 itrip (over current detection function, pin 1 5 ) ................................ ................................ ................................ .......... 6 vdd, vss ( low side c ontrol supply and reference, pin 13, 16 ) ................................ ................................ ................... 6 vb(u, v, w) and vs(u, v, w) (high side supplies, pin 1 - 6) ................................ ................................ .......................... 6 nw , n v, nu ( l ow side emitter, pin 17 - 19 ) ................................ ................................ ................................ ................. 6 w, v, u (high side emitter and low side collector, pin 20 - 22) ................................ ................................ ................... 6 p ( p ositive bus input voltage, pin 23 ) ................................ ................................ ................................ .......................... 6 absolute maximum ratings ................................ ................................ ................................ ................................ ... 7 module section ................................ ................................ ................................ ................................ ............................ 7 inverter secti on ................................ ................................ ................................ ................................ ............................ 7 control section ................................ ................................ ................................ ................................ ............................ 7 recommended operation conditions ................................ ................................ ................................ ................... 8 static parameters ................................ ................................ ................................ ................................ .................. 9 dynamic parameters ................................ ................................ ................................ ................................ ........... 10 bootstrap parameters ................................ ................................ ................................ ................................ ......... 10 thermistor ................................ ................................ ................................ ................................ ......................... 11 mechanical characteristics and ratings ................................ ................................ ................................ .............. 11 circuit of a typical application ................................ ................................ ................................ ............................ 12 switching times definition ................................ ................................ ................................ ................................ .. 13 electrical characteristic ................................ ................................ ................................ ................................ ....... 14 package outline ................................ ................................ ................................ ................................ ................... 15 revision history ................................ ................................ ................................ ................................ ................... 16
datasheet 3 <2016 - 08 - 01> control integrated power system (cipos?) ikcm20l60ga cipos ? c ontrol i ntegrated po wer s ystem dual in - line intelligent power module 3 - bridge 600v / 20 a features fully isolated dual in - line molded module ? trenchstop ? igbts ? rugged soi gate driver technology with stability against transient and negative voltage ? allowable negative vs potential up to - 11v for signal transmission at vbs=15v ? integrated bootstrap functionality ? over current shutdown ? temperature monitor ? under - voltage lockout at all channels ? low side emitter pins accessible for all phase current monitoring (open emitter) ? cross - conduction prevention ? all of 6 switches turn off during protection ? lead - free terminal plating; rohs compliant target a pplications ? dish washer s ? refrigerator s ? washing machines ? air - conditioners ? fans ? low power motor drives description the cipos ? module family offers the chance for integrating various power and control components to increase reliability, optimize pcb size and system costs. it is designed to control three phase ac motors and permanent magnet motors in variable speed drives for appl ications like an air conditioning, a refrigerator and a washing machine. the package concept is specially adapted to power applications, which need good thermal conduction and electrical isolation, but also emi - save c ontrol and overload protection. trenchs top ? igbts and anti parallel diodes are combined with a n optimized soi gate driver for excellent electrical performance. system configuration ? 3 half bridges with trenchstop ? igbts and anti parallel diodes ? 3 soi gate driver ? thermistor ? pin - to - hea t sink clearance distance typ . 1. 6 mm
datasheet 4 <2016 - 08 - 01> control integrated power system (cipos?) ikcm20l60ga pin configuration bottom view figure 1 pin configuration internal electrical schematic figure 2 internal s chematic ( 1 ) v s ( u ) ( 2 ) v b ( u ) ( 3 ) v s ( v ) ( 4 ) v b ( v ) ( 5 ) v s ( w ) ( 6 ) v b ( w ) ( 7 ) h i n ( u ) ( 8 ) h i n ( v ) ( 9 ) h i n ( w ) ( 1 0 ) l i n ( u ) ( 1 1 ) l i n ( v ) ( 1 2 ) l i n ( w ) ( 1 3 ) v d d ( 1 4 ) v f o ( 1 5 ) i t r i p ( 1 6 ) v s s ( 2 3 ) p ( 2 2 ) u ( 2 1 ) v ( 2 0 ) w ( 1 9 ) n u ( 1 8 ) n v ( 1 7 ) n w ( 2 4 ) n c v s s v d d l i n 3 l i n 2 l i n 1 v f o i t r i p l o 3 l o 2 l o 1 h o 1 h o 2 h o 3 v b 1 v s 1 v b 2 v s 2 v b 3 v s 3 h i n 3 h i n 2 h i n 1 n w ( 1 7 ) n v ( 1 8 ) w ( 2 0 ) v ( 2 1 ) u ( 2 2 ) p ( 2 3 ) ( 2 ) v b ( u ) ( 1 5 ) i t r i p ( 1 4 ) v f o ( 1 0 ) l i n ( u ) ( 1 1 ) l i n ( v ) ( 1 2 ) l i n ( w ) ( 1 6 ) v s s ( 1 3 ) v d d ( 4 ) v b ( v ) ( 6 ) v b ( w ) ( 7 ) h i n ( u ) ( 8 ) h i n ( v ) ( 9 ) h i n ( w ) ( 1 ) v s ( u ) ( 3 ) v s ( v ) ( 5 ) v s ( w ) n u ( 1 9 ) n c ( 2 4 ) t h e r m i s t o r r b s 1 r b s 2 r b s 3
datasheet 5 <2016 - 08 - 01> control integrated power system (cipos?) ikcm20l60ga pin assignment pin number pin name pin description 1 vs(u ) u - phase high side floating ic supply offset voltage 2 vb(u) u - phase high side floating ic supply voltage 3 vs(v) v - phase high side floating ic supply offset voltage 4 vb(v) v - phase high side floating ic supply voltage 5 vs(w) w - phase high side floating ic supply offset voltage 6 vb(w) w - phase high side floating ic supply voltage 7 hin(u) u - phase high side gate driver input 8 hin(v) v - phase high side gate driver input 9 hin(w) w - phase high side gate driver input 10 lin(u) u - phase low side gate driver input 11 lin(v) v - phase low side gate driver input 12 lin(w) w - phase low side gate driver input 13 vdd low side control supply 14 vfo fault output / temperature monitor 15 itrip over current shutdown input 16 vss low side control negative supply 17 nw w - phase low side emitter 18 nv v - phase low side emitter 19 nu u - phase low side emitter 20 w motor w - phase output 21 v motor v - phase output 22 u motor u - phase output 23 p positive bus input voltage 24 nc no connection pin description hin(u, v, w) and lin(u, v, w) (low side and high side control pins, pin 7 - 12) these pins are positive logic and they are responsible for the control of the integrated igbt . the schmitt - trigger input threshold s of them are such to guarantee lsttl and cmos compatibility down to 3.3v controller outputs. pull - down resistor of about 5 k ? is internally provided to pre - bias inputs during supply start - up and a zener clamp is provided for pin protection purposes. input s chmitt - trigger and noise filter provide beneficial noise rejection to short input pulses. the noise filter suppresses control pulses which are below the filter time t filin . the filter acts according to figure 4 . figure 3 input pin structure figure 4 input filter timing diagram c i p o s t m u z = 1 0 . 5 v i n p u t n o i s e f i l t e r s c h m i t t - t r i g g e r s w i t c h l e v e l v i h ; v i l v s s h i n x l i n x ? ? k 5 h i n l i n h o l o l o w h i g h t f i l i n t f i l i n a ) b ) h i n l i n h o l o
datasheet 6 <2016 - 08 - 01> control integrated power system (cipos?) ikcm20l60ga it is not recommended for proper work to provide input pulse - width lower than 1 s . the integrated gate drive provides additionally a shoot through prevention capability which avoids the simultaneous on - state of two gate drivers of the same leg (i.e. ho1 and lo1, ho2 and lo2, ho3 and lo3). when two inputs of a same leg are activated, only former activated one is activated so that the leg is kept steadily in a safe state. a minimum deadtime insertion of typically 380ns is also provided by driver ic, in order to reduce cross - conduction of the external power switches. vfo ( fault - output and ntc , pin 1 4 ) the vfo pin indicates a module failure in case of under voltage at pin vdd or in case of triggered over current detection at itrip. a pull - up resistor is ext ernally required . figure 5 internal c ircuit at pin vfo the same pin provides direct access to the ntc, which is referenced to vss. an external pull - up res istor connected to +5v ensures that the resulting voltage can be directly connected to the microcontroller. itrip (over current detection function, pin 1 5 ) cipos ? provides an over current detection function by connecting the itrip input with the igbt collector current feedback. the itrip comparator threshold (typ . 0.4 7 v) is referenced to vss ground. a n input noise filter ( t yp . : t itripmin = 530 ns) prevents the driver to detect false over - current events. ove r current detection generates a shutdown of all outputs of the gate driver after the shutdown propagation delay of typically 100 0ns. the fa ult - clear time is set to minimum 40 s . vdd, vss ( low side c ontrol supply and reference, pin 13, 16 ) vdd is the control supply and it provides power both to input logic and to output power stage. input logic is referenced to vss ground. the under - voltage circuit enables the device to operate at power on when a supply voltage of at least a typical voltage of v dd uv+ = 12.1 v is present. the ic shuts down all the gate drivers power outputs, when the vdd supply voltage is below v dd uv - = 10. 4 v. this prevents the external power switches from critically low gate voltage levels during on - state and therefore from excessive power dissipation. vb(u, v, w) and vs(u, v, w) (high side supplies, pin 1 - 6) vb to vs is the high side supply voltage. the high side circuit can float with respect to vss following the external high side power device emitter voltage. due to the low power consumption, the floating driver stage is supplied by integrated bootstrap circuit. the under - voltage detection operates wi th a rising supply threshold of typical v bsuv+ = 12.1v and a falling threshold of v bsuv - = 10.4v. vs(u, v, w) provide a high robustness against negative voltage in respect of vss of - 50v transiently. this ensures very stable designs even under rough condi tions. n w , n v, n u ( l ow side emitter, pin 17 - 19 ) the low side emitters are available for current measurements of each phase leg. it is recommended to keep the connection to pin vss as short as possible in order to avoid unnecessary inductive voltage drops . w , v, u ( high side emitter and low side collector , pin 20 - 22 ) these pins are motor u, v, w input pins . p ( p ositive bus input voltage, pin 23 ) the high side igbt s are connected to the bus voltage. it is note d that the bus voltage does not exceed 4 5 0v. v f o v s s v d d 1 r o n , f l t f r o m i t r i p - l a t c h f r o m u v d e t e c t i o n c i p o s t m t h e r m i s t o r
datasheet 7 <2016 - 08 - 01> control integrated power system (cipos?) ikcm20l60ga absolute maximum ratings ( v dd = 15v and t j = 25c, if not stated otherwise) module section description condition symbol value unit min max storage temperature range t stg - 40 125 c i solation test voltage rms, f = 6 0hz, t = 1min v isol 2 0 00 - v operating case temperature range refer to figure 6 t c - 4 0 1 00 c inverter section description condition symbol value unit min max max. blocking voltage i c = 250 a v ces 600 - v dc link supply voltage of p - n applied between p - n v pn - 450 v dc link supply voltage (surge) of p - n applied between p - n v pn(surge) - 500 v output current t c = 25 c , t j < 150 c t c = 80 c , t j < 150 c i c - 20 - 15 20 15 a maximum peak output current less than 1ms i c (peak) - 40 40 a short circuit withstand time 1 v dc 400v , t j = 150 c t sc - 5 s power dissipation per igbt p tot - 2 9.2 w operating junction temperature range t j - 40 150 c single igbt thermal resistance, junction - case r thjc - 4. 28 k/w single diode thermal resistance, junction - case r thjc d - 4.87 k/w control section description condition symbol value unit min max module supply voltage v dd - 1 20 v high side floating supply voltage (vb vs. vs) v bs - 1 20 v input voltage lin, hin, itrip v in v itrip - 1 - 1 10 10 v s witching frequency f pwm - 20 khz 1 allowed number of short circuits: <1000; time between short circuits: >1s .
datasheet 8 <2016 - 08 - 01> control integrated power system (cipos?) ikcm20l60ga recommended operation conditions all voltages are absolute voltages referenced to v ss - potential unless otherwise specified. description symbol value unit min typ max dc link supply voltage of p - n v pn 0 - 4 0 0 v high side floating supply voltage (v b vs. v s ) v bs 13.5 - 1 8 .5 v low side supply voltage v dd 14.5 16 1 8 .5 v control supply variation v bs , v dd - 1 - 1 - - 1 1 v / s logic input voltages lin, hin, itrip v in v itrip 0 0 - - 5 5 v between vss - n (including surge) v ss - 5 - 5 v figure 6 t c measurement po int 1 1 a ny measurement except for the specified point in figure 6 is not relevant for the temperature verification and brings wrong or different information .
datasheet 9 <2016 - 08 - 01> control integrated power system (cipos?) ikcm20l60ga static parameters ( v dd = 15v and t j = 25c, if not stated otherwise) description condition symbol value unit min typ max collector - emitter saturation voltage i c = 1 5 a t j = 25c 150c v ce(sat) - - 1.55 1.8 5 2. 05 - v diode forward voltage i f = 1 5 a t j = 25c 150c v f - - 1. 7 1. 7 2.4 - v collector - emitter l eakage current v ce = 60 0v i ce s - - 1 m a logic " 1 " input voltage (lin, hin) v i h - 2.1 2.5 v logic " 0 " input voltage (lin, hin) v il 0.7 0. 9 - v itrip positive going threshold v it,th+ 400 4 7 0 540 mv itrip input hysteresis v it,hys 40 70 - mv v dd and v bs supply under voltage positive going threshold v dduv+ v bsuv+ 10.8 12. 1 13.0 v v dd and v bs supply under voltage negative going threshold v dduv - v bsuv - 9.5 10. 4 11. 2 v v dd and v bs supply under voltage lockout hysteresis v dduvh v bsuvh 1.0 1. 7 - v input clamp voltage (hin, lin, itrip) iin=4ma v inclamp 9.0 10.1 12.5 v quiescent vb x supply current (vb x only) h in = 0v i qb s - 3 0 0 500 a quiescent v dd supply current (vdd only) l i n = 0v, h inx = 5v i qdd - 370 900 a input bias current v in = 5v i in+ - 1 1.5 m a input bias current v in = 0v i in - - 2 - a itrip i nput bias current v itrip = 5v i itrip+ - 65 1 5 0 a vfo input bias current vfo = 5v, v itrip = 0 v i fo - 60 - a vfo output voltage i fo = 10ma, v itrip = 1 v v fo - 0.5 - v
datasheet 10 <2016 - 08 - 01> control integrated power system (cipos?) ikcm20l60ga dynamic parameters ( v dd = 15v and t j = 25c, if not stated otherwise) description condition symbol value unit min typ max turn - on propagation delay time v lin , hin = 5 v , i c = 15a , v dc = 3 00v t on - 620 - ns turn - on rise time t r - 30 - ns turn - on switching time t c (on) - 200 - ns reverse recovery time t rr - 130 - ns turn - off propagation delay time v lin , hin = 0 v , i c = 15a , v dc = 3 00v t off - 910 - n s turn - o ff fall time t f - 75 - ns turn - o ff switching time t c (o ff ) - 120 - ns short circuit propagation delay time from v it,th+ to 10% i sc t scp - 1200 - n s input filter time itrip v itrip = 1v t itripmin - 530 - ns input filter time at lin , hin for turn on and off v lin , hin = 0 v & 5v t filin - 290 - ns fault clear time after itrip - fault v itrip = 1 v t fltclr 40 65 200 s d eadtime between low side and high side dt pwm 1.5 - - s deadtime of gate drive circuit dt ic - 380 - ns igbt t urn - on e nergy (includes reverse recovery of diode) v dc = 3 00v , i c = 15a t j = 25c 150c e on - - 470 610 - - j igbt t urn - o ff e nergy v dc = 3 00v , i c = 15a t j = 25c 150c e off - - 270 360 - - j diode recovery e nergy v dc = 3 00v , i c = 15a t j = 25c 150c e rec - - 55 105 - - j bootstrap parameters (t j = 25c, if not stated otherwise) description condition symbol value unit min typ max repetitive peak reverse voltage v rrm 600 - - v bootstrap diode resistance of u - phase 1 vs2 or vs3 = 300v, t j = 25c vs2 and vs3 = 0v, t j = 25c vs2 or vs3 = 300v, t j = 125c vs2 and vs3 = 0v, t j = 125c bs 1 - 35 40 50 65 - f = 0.6a, di/ dt = 80a/ s t rr_bs - 50 - ns forward voltage drop f = 20 ma , vs2 and vs3 = 0v v f _bs 2.6 v 1 r bs2 and r bs3 have same values to r bs1 .
datasheet 11 <2016 - 08 - 01> control integrated power system (cipos?) ikcm20l60ga thermistor description condition symbol value unit min typ max resistor t ntc = 25 c r ntc - 85 - k ? b - constant of ntc (negative t emperature c oefficient) b(25/100) - 4092 - k figure 7 thermistor resistance C temperature curve and table (for more information, please refer to the application note an2016 - 10 cipos mini technical description ) mechanical characteristics and ratings description condition value unit min t yp max mounting torque m3 screw and washer 0.5 9 0.69 0.78 nm flatness refer to figure 8 - 50 - 100 m weight - 6. 15 - g figure 8 flatness measurement position -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 110 120 130 0 500 1000 1500 2000 2500 3000 3500 thermistor temperature [ thermistor resistance [ k ? ] + + - - 50 55 60 65 70 75 80 85 90 95 100 105 110 115 120 125 130 0 5 10 15 20 25 30 35 thermistor temperature [ thermistor resistance [ k ? ] min. typ. max.
datasheet 12 <2016 - 08 - 01> control integrated power system ( cipos?) ikcm20l60ga circuit of a typical application figure 9 typical a pplication circuit 1. input circuit - to reduce input signal noise by high speed switching, the r in and c in filter circuit should be mounted. (100, 1nf) - c in should be placed as close to v ss pin as possible. 2. itrip circuit - to prevent protection function errors, c itrip should be placed as close to itrip and v ss pins as pos sible. 3. vfo circuit - vfo output is an open drain output. this signal line should be pulled up to the positive side of the 5v/3.3v logic power supply with a proper resistor r pu . - it is recommended that rc filter be placed as close to the controller as possibl e. 4. vb - vs circuit - capacitor for high side floating supply voltage should be placed as close to vb and vs pins as possible. 5. snubber capacitor - the wiring between cipos ? m ini and snubber capacitor including shunt resistor should be as short as possible. 6. shunt resistor - the shunt resistor of smd type should be used for reducing its stray inductance. 7. ground pattern - ground pattern should be separated at only one point of shunt resistor as short as possible. v d d l i n e 5 o r 3 . 3 v l i n e u - p h a s e c u r r e n t s e n s i n g n w ( 1 7 ) n v ( 1 8 ) w ( 2 0 ) v ( 2 1 ) u ( 2 2 ) p ( 2 3 ) ( 2 ) v b ( u ) ( 1 5 ) i t r i p ( 1 4 ) v f o ( 1 0 ) l i n ( u ) ( 1 1 ) l i n ( v ) ( 1 2 ) l i n ( w ) ( 1 6 ) v s s ( 1 3 ) v d d ( 4 ) v b ( v ) ( 6 ) v b ( w ) ( 7 ) h i n ( u ) ( 8 ) h i n ( v ) ( 9 ) h i n ( w ) ( 1 ) v s ( u ) ( 3 ) v s ( v ) ( 5 ) v s ( w ) n u ( 1 9 ) n c ( 2 4 ) t h e r m i s t o r v s s v d d l i n 3 l i n 2 l i n 1 v f o i t r i p l o 3 l o 2 l o 1 h o 1 h o 2 h o 3 v b 1 v s 1 v b 2 v s 2 v b 3 v s 3 h i n 3 h i n 2 h i n 1 r b s 1 r b s 2 r b s 3 < s i g n a l f o r p r o t e c t i o n > t e m p e r a t u r e m o n i t o r m i c r o c o n t r o l l e r # 1 # 2 # 3 # 4 # 5 # 6 # 7 3 - p h a c m o t o r v - p h a s e c u r r e n t s e n s i n g w - p h a s e c u r r e n t s e n s i n g < s i g n a l f o r p r o t e c t i o n > p o w e r g n d l i n e c o n t r o l g n d l i n e
datasheet 13 <2016 - 08 - 01> control integrated power system ( cipos?) ikcm20l60ga switching times definition figure 10 switching times definition h i n x l i n x i c x v c e x 0 . 9 v 2 . 1 v 9 0 % 1 0 % 1 0 % 1 0 % 9 0 % t o f f t f t o n t r t c ( o f f ) t c ( o n ) 1 0 % t r r 1 0 %
datasheet 14 <2016 - 08 - 01> control integrated power system ( cipos?) ikcm20l60ga electrical characteristic typ. collector C emitter saturation voltage typ. turn on switching energy loss typ. turn on propagation delay time typ. turn off switching time typ. collector C emitter saturation voltage typ. turn off switching energy loss typ. turn on switching time typ. reverse recovery time typ. diode forward voltage typ. reverse recovery energy loss typ. turn off propagation delay time igbt transient thermal resistance at all six igbts operation 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 0 5 10 15 20 25 30 35 40 t j =25 v dd =15v v dd =20v ic, collector - emitter current [a] v ce (sat), collector - emitter voltage [v] 0 5 10 15 20 25 30 35 40 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 v dc =300v v dd =15v high side @t j =25 high side @t j =150 low side @t j =25 j =150 eon, turn on switching energy loss [mj] ic, collector current [a] 0 5 10 15 20 25 30 35 40 570 600 630 660 690 720 750 780 810 840 v dc =300v v dd =15v high side @t j =25 j =150 low side @t j =25 j =150 t on , turn on propagation delay time [ns] ic, collector current [a] 0 5 10 15 20 25 30 35 40 50 100 150 200 250 300 350 400 450 high side @t j =25 high side @t j =150 low side @t j =25 low side @t j =150 v dc =300v v dd =15v t c(off) , turn off switching time [ns] ic, collector current [a] 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 0 5 10 15 20 25 30 35 40 v dd =15v t j =25 j =150 ic, collector - emitter current [a] v ce (sat), collector - emitter voltage [v] 0 5 10 15 20 25 30 35 40 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 high side @t j =25 high side @t j =150 low side @t j =25 j =150 v dc =300v v dd =15v eoff, turn off switching energy loss [mj] ic, collector current [a] 0 5 10 15 20 25 30 35 40 0 100 200 300 400 500 600 700 800 v dc =300v v dd =15v high side @t j =25 j =150 low side @t j =25 j =150 t c(on) , turn on switching time [ns] ic, collector current [a] 0 5 10 15 20 25 30 35 40 0 50 100 150 200 250 300 350 400 450 500 550 600 high side @t j =25 j =150 j =25 j =150 v dc =300v v dd =15v t rr , reverse recovery time [ns] ic, collector current [a] 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 0 5 10 15 20 25 30 35 40 t j =25 j =150 i f , emitter - collector current [a] v f , emitter - collector voltage [v] 0 5 10 15 20 25 30 35 40 0 20 40 60 80 100 120 140 160 180 200 220 240 v dc =300v v dd =15v high side @t j =25 high side @t j =150 low side @t j =25 low side @t j =150 erec, reverse recovery energy loss [uj] ic, collector current [a] 0 5 10 15 20 25 30 35 40 700 800 900 1000 1100 1200 1300 1400 1500 v dc =300v v dd =15v high side @t j =25 high side @t j =150 low side @t j =25 low side @t j =150 t off , turn off propagation delay time [ns] ic, collector current [a] 1e-7 1e-6 1e-5 1e-4 1e-3 0.01 0.1 1 10 100 1e-4 1e-3 0.01 0.1 1 10 d : duty ratio d=50% d=20% d=10% d=5% d=2% single pulse z thjc , rc-igbt transient thermal resistance [k/w] t p , pulse width [sec.]
datasheet 15 <2016 - 08 - 01> control integrated power system ( cipos?) ikcm20l60ga package outline
datasheet 16 <2016 - 08 - 01> control integrated power system ( cipos?) ikcm20l60ga revision history major changes since the last revision page or reference description of change additional information and typo corrections 4 pin configuration 15 package outline
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